The use of a clock circuit to provide a frequency reference is well known in the art. Most complex circuits require a frequency reference to advance the state of digital processors and other synchronous electronic circuits. For example, clock signals are used in digital cellular telephones, computers, computer peripherals, digital instruments, and a host of other devices too numerous to mention. Many complex electronic circuits, including micro-processors, micro-controllers, digital signal processors (DSP) and other digital or synchronous circuits, require an active clock input during reset to set their internal logic to a known initial state. In some circuits, the failure to provide sufficient clock pulses during reset can result in an incompletely initialized circuit, needlessly drawing excessive current during and after reset. The output of such circuits could also exit reset in an unknown state, potentially causing erroneous system behavior where those outputs control other circuits and devices.
Many complex electronic devices use more than one processor, each of which requires a clock signal, often at different frequencies. One example is a digital cellular telephone, which requires a clock signal for both the micro-controller and the digital signal processor in the phone. This problem is not unique to digital cellular telephones, but can arise in many other electronic devices having multiple processors. When faced with a circuit design that has multiple processors, there is frequently a question about the number of oscillators to use.
One solution to the multiple clock problem is to provide a dedicated oscillator for the micro-controller and DSP. However, dedicating an oscillator or frequency reference to both the micro-controller and DSP is expensive, consumes space, consumes more power than single oscillator designs, and makes power management by clock gating more difficult. In addition, multiple clocks present potential problems with clock synchronization and harmonic interference that may require specialized circuit layout techniques, such as dedicated ground planes and careful physical partitioning of circuits connected to each clock net.
Another solution is to route the clock signal from a single clock source to multiple processors. This approach may require buffers and may require the clock signal to be routed over long distances. In general, it is considered good practice to keep signals localized whenever possible to minimize the spread of switching harmonics through a system. Also, this approach is undesirable in some circuits that use a micro-controller that is periodically reset because it requires the clock to remain active during reset. During reset, that oscillator may draw a substantial amount of current. This is not desirable for battery powered devices.
Many micro-controller circuits attempt to facilitate the use of a single oscillator in the system by accepting a high frequency input and providing the same frequency clock output, or a synchronized, lower frequency version of the clock at the output of the micro-controller, for use by other circuits in the system. However, many of these micro-controllers do not provide the clock outputs during reset. To provide the requisite clock signal to other circuits in the system during reset, multiple oscillators are required. This solution is costly, wastes valuable system component space, and consumes more power than a single oscillator solution.
Accordingly, there remains a need for a simple, low-cost clock circuit that uses a single clock network that can provide a clock signal during reset that is required by circuits requiring a clock signal for initialization.